Datasheet

PIC16F882/883/884/886/887
DS41291G-page 16  2006-2012 Microchip Technology Inc.
FIGURE 1-1: PIC16F882/883/886 BLOCK DIAGRAM
Flash
Program
Memory
13
Data Bus
8
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
Instruction
Decode and
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
8
8
8
3
8-Level Stack
128
(2)
/256
(1)
/
2K
(2)
/4K
(1)
/
(13-Bit)
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
MCLR
VSS
Brown-out
Reset
Timer0 Timer1
Data
EEPROM
128
(2)
/
EEDATA
EEADDR
T0CKI
T1CKI
Configuration
Internal
Oscillator
T1G
VDD
8
Timer2
ECCP
Block
2 Analog ComparatorsVREF+
and Reference
Analog-To-Digital Converter
(ADC)
AN0 AN1 AN2 AN3 AN4 AN8 AN9
AN10
AN11
AN12 AN13
C1IN+
C12IN0- C12IN1- C12IN2- C12IN3-
C1OUT
C2IN+
C2OUT
CCP1/P1A P1B P1C P1D
PORTA
PORTC
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
PORTB
EUSART
TX/CK
RX/DT
PORTE
RE3
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
RB0
RB1
RB2
RB3
RB4
RB5
RB6
RB7
Timer1
32 kHz
Oscillator
Master Synchronous
Serial Port (MSSP)
CCP2
CCP2
SDO SDI/SDA SCK/SCL SS
VREF-
14
Note 1: PIC16F883 only.
2: PIC16F882 only.
VREF+
VREF-
CVREF
In-Circuit
Debugger
(ICD)
T1OSI
T1OSO
8K X 14
368 Bytes
256 Bytes