Datasheet

 2001-2013 Microchip Technology Inc. DS39582C-page 187
PIC16F87XA
FIGURE 17-10: PARALLEL SLAVE PORT TIMING (PIC16F874A/877A ONLY)
TABLE 17-8: PARALLEL SLAVE PORT REQUIREMENTS (PIC16F874A/877A ONLY)
Note: Refer to Figure 17-3 for load conditions.
RE2/CS
RE0/RD
RE1/WR
RD7:RD0
62
63
64
65
Param
No.
Symbol Characteristic Min Typ† Max Units Conditions
62 T
DTV2WRH Data In Valid before WR  or CS  (setup time) 20 — — ns
63* T
WRH2DTIWR  or CS  to Data–in Invalid
(hold time)
Standard(F)20——ns
Extended(LF)35——ns
64 T
RDL2DTVRD  and CS  to Data–out Valid — — 80 ns
65 T
RDH2DTIRD  or CS  to Data–out Invalid 10 — 30 ns
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.