Datasheet

PIC16F87XA
DS39582C-page 184  2001-2013 Microchip Technology Inc.
FIGURE 17-6: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
FIGURE 17-7: BROWN-OUT RESET TIMING
TABLE 17-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
34
I/O pins
34
Note: Refer to Figure 17-3 for load conditions.
VDD
VBOR
35
Param
No.
Symbol Characteristic Min Typ† Max Units Conditions
30 T
MCLMCLR Pulse Width (low) 2 — — sVDD = 5V, -40°C to +85°C
31* T
WDT Watchdog Timer Time-out Period
(no prescaler)
71833msVDD = 5V, -40°C to +85°C
32 T
OST Oscillation Start-up Timer Period — 1024 TOSC ——TOSC = OSC1 period
33* T
PWRT Power-up Timer Period 28 72 132 ms VDD = 5V, -40°C to +85°C
34 T
IOZ I/O High-Impedance from MCLR Low
or Watchdog Timer Reset
——2.1s
35 T
BOR Brown-out Reset Pulse Width 100 — — sVDD  VBOR (D005)
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are
not tested.