Datasheet

PIC16F87XA
DS39582C-page 182  2001-2013 Microchip Technology Inc.
FIGURE 17-4: EXTERNAL CLOCK TIMING
OSC1
CLKO
Q4 Q1 Q2 Q3 Q4 Q1
1
2
3
3
4
4
TABLE 17-3: EXTERNAL CLOCK TIMING REQUIREMENTS
Param
No.
Symbol Characteristic Min Typ† Max Units Conditions
F
OSC External CLKI Frequency
(Note 1)
DC — 1 MHz XT and RC Osc mode
DC — 20 MHz HS Osc mode
DC — 32 kHz LP Osc mode
Oscillator Frequency
(Note 1)
DC — 4 MHz RC Osc mode
0.1 — 4 MHz XT Osc mode
4
5
—
—
20
200
MHz
kHz
HS Osc mode
LP Osc mode
1TOSC External CLKI Period
(Note 1)
1000 — — ns XT and RC Osc mode
50 — — ns HS Osc mode
5——sLP Osc mode
Oscillator Period
(Note 1)
250 — — ns RC Osc mode
250 — 1 s XT Osc mode
100 — 250 ns HS Osc mode
50 — 250 ns HS Osc mode
31.25 — — sLP Osc mode
2T
CY Instruction Cycle Time
(Note 1)
200 TCY DC ns TCY = 4/FOSC
3T
OSL,
T
OSH
External Clock in (OSC1) High or
Low Time
100 — — ns XT oscillator
2.5 — — s LP oscillator
15 — — ns HS oscillator
4T
OSR,
T
OSF
External Clock in (OSC1) Rise or
Fall Time
— — 25 ns XT oscillator
— — 50 ns LP oscillator
— — 15 ns HS oscillator
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time base period. All specified values are
based on characterization data for that particular oscillator type, under standard operating conditions, with
the device executing code. Exceeding these specified limits may result in an unstable oscillator operation
and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an
external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “max.” cycle time
limit is “DC” (no clock) for all devices.