Datasheet
PIC16F87XA
DS39582C-page 130 2001-2013 Microchip Technology Inc.
11.1 A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
HOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 11-2. The source
impedance (R
S) and the internal sampling switch
impedance (R
SS) directly affect the time required to
charge the capacitor C
HOLD. The sampling switch
(R
SS) impedance varies over the device voltage (VDD);
see Figure 11-2. The maximum recommended
impedance for analog sources is 2.5 k. As the
impedance is decreased, the acquisition time may be
decreased. After the analog input channel is selected
(changed), this acquisition must be done before the
conversion can be started.
To calculate the minimum acquisition time,
Equation 11-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
To calculate the minimum acquisition time, T
ACQ, see
the PIC
®
Mid-Range MCU Family Reference Manual
(DS33023).
EQUATION 11-1: ACQUISITION TIME
FIGURE 11-2: ANALOG INPUT MODEL
TACQ
TC
TACQ
=
=
=
=
=
=
=
=
Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient
T
AMP + TC + TCOFF
2 s + TC + [(Temperature – 25°C)(0.05 s/°C)]
C
HOLD (RIC + RSS + RS) In(1/2047)
- 120 pF (1 k + 7 k + 10 k) In(0.0004885)
16.47 s
2 s + 16.47 s + [(50°C – 25C)(0.05 s/C)
19.72 s
Note 1: The reference voltage (VREF) has no effect on the equation since it cancels itself out.
2: The charge holding capacitor (C
HOLD) is not discharged after each conversion.
3: The maximum recommended impedance for analog sources is 2.5 k. This is required to meet the pin
leakage specification.
CPIN
VA
R
S
ANx
5 pF
V
DD
VT = 0.6V
V
T = 0.6V
I
LEAKAGE
RIC 1K
Sampling
Switch
SS
R
SS
CHOLD
= DAC Capacitance
V
SS
6V
Sampling Switch
5V
4V
3V
2V
567891011
(k)
VDD
= 120 pF
± 500 nA
Legend: CPIN
VT
ILEAKAGE
RIC
SS
C
HOLD
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions