Datasheet

PIC16F87XA
DS39582C-page 122  2001-2013 Microchip Technology Inc.
TABLE 10-8: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
FIGURE 10-9: SYNCHRONOUS TRANSMISSION
FIGURE 10-10: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR, BOR
Value on
all other
Resets
0Bh, 8Bh,
10Bh,18Bh
INTCON GIE PEIE
TMR0IE INTE RBIE TMR0IF INTF R0IF 0000 000x 0000 000u
0Ch PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
18h RCSTA SPEN
RX9 SREN CREN — FERR OERR RX9D 0000 -00x 0000 -00x
19h TXREG USART Transmit Register 0000 0000 0000 0000
8Ch PIE1
PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
98h TXSTA CSRC TX9 TXEN SYNC
— BRGH TRMT TX9D 0000 -010 0000 -010
99h SPBRG Baud Rate Generator Register 0000 0000 0000 0000
Legend: x = unknown, - = unimplemented, read as ‘0’. Shaded cells are not used for synchronous master transmission.
Note 1: Bits PSPIE and PSPIF are reserved on 28-pin devices; always maintain these bits clear.
bit 0 bit 1 bit 7
Word 1
Q1 Q2 Q3 Q4 Q1Q2 Q3 Q4 Q1Q2Q3 Q4Q1 Q2Q3 Q4Q1 Q2 Q3 Q4 Q3 Q4 Q1Q2 Q3Q4 Q1Q2 Q3Q4 Q1Q2 Q3 Q4Q1 Q2 Q3 Q4 Q1Q2 Q3 Q4 Q1 Q2Q3 Q4
bit 2 bit 0 bit 1 bit 7
RC7/RX/DT
RC6/TX/CK
Write to
TXREG reg
TXIF bit
(Interrupt Flag)
TXEN bit
‘1’ ‘1’
Word 2
TRMT bit
Write Word 1
Write Word 2
Note: Sync Master mode; SPBRG = 0. Continuous transmission of two 8-bit words.
pin
pin
RC7/RX/DT pin
RC6/TX/CK pin
Write to
TXREG Reg
TXIF bit
TRMT bit
bit 0
bit 1
bit 2
bit 6 bit 7
TXEN bit