Datasheet

PIC16F87X

DS30292C-page 86  2001 Microchip Technology Inc.

9.2.13 ACKNOWLEDGE SEQUENCE

TIMING

An Acknowledge sequence is enabled by setting the

Acknowledge Sequence Enable bit, ACKEN

(SSPCON2<4>). When this bit is set, the SCL pin is

pulled low and the contents of the Acknowledge data bit

is presented on the SDA pin. If the user wishes to gen-

erate an Acknowledge, the ACKDT bit should be

cleared. If not, the user should set the ACKDT bit

before starting an Acknowledge sequence. The baud

rate generator then counts for one rollover period

BRG), and the SCL pin is de-asserted high. When the

SCL pin is sampled high (clock arbitration), the baud

rate generator counts for T

BRG. The SCL pin is then

pulled low. Following this, the ACKEN bit is automati-

cally cleared, the baud rate generator is turned off,

and the SSP module then goes into IDLE mode

(Figure 9-16).

9.2.13.1 WCOL Status Flag

If the user writes the SSPBUF when an Acknowledge

sequence is in progress, the WCOL is set and the con-

tents of the buffer are unchanged (the write doesn’t

occur).

FIGURE 9-16: ACKNOWLEDGE SEQUENCE WAVEFORM

Note: TBRG = one baud rate generator period.

SDA

SCL

Set SSPIF at the end

Acknowledge sequence starts here,

Write to SSPCON2

ACKEN automatically cleared

Cleared in

TBRG

of receive

ACK

ACKEN = 1, ACKDT = 0

SSPIF

software

Set SSPIF at the end

of Acknowledge sequence

Cleared in

software