Datasheet

PIC16F872

TMR1L xxxx xxxx uuuu uuuu uuuu uuuu

TMR1H xxxx xxxx uuuu uuuu uuuu uuuu

T1CON --00 0000 --uu uuuu --uu uuuu

TMR2 0000 0000 0000 0000 uuuu uuuu

T2CON -000 0000 -000 0000 -uuu uuuu

SSPBUF xxxx xxxx uuuu uuuu uuuu uuuu

SSPCON 0000 0000 0000 0000 uuuu uuuu

CCPR1L xxxx xxxx uuuu uuuu uuuu uuuu

CCPR1H xxxx xxxx uuuu uuuu uuuu uuuu

CCP1CON --00 0000 --00 0000 --uu uuuu

ADRESH xxxx xxxx uuuu uuuu uuuu uuuu

ADCON0 0000 00-0 0000 00-0 uuuu uu-u

OPTION_REG 1111 1111 1111 1111 uuuu uuuu

TRISA --11 1111 --11 1111 --uu uuuu

TRISB 1111 1111 1111 1111 uuuu uuuu

TRISC 1111 1111 1111 1111 uuuu uuuu

PIE1 r0rr 0000 r0rr 0000 rurr uuuu

PIE2 -r-0 0--r -r-0 0--r -r-u u--r

PCON ---- --qq ---- --uu ---- --uu

SSPCON2 0000 0000 0000 0000 uuuu uuuu

PR2 1111 1111 1111 1111 1111 1111

SSPADD 0000 0000 0000 0000 uuuu uuuu

SSPSTAT --00 0000 --00 0000 --uu uuuu

ADRESL xxxx xxxx uuuu uuuu uuuu uuuu

ADCON1 0--- 0000 0--- 0000 u--- uuuu

EEDATA 0--- 0000 0--- 0000 u--- uuuu

EEADR xxxx xxxx uuuu uuuu uuuu uuuu

EEDATH xxxx xxxx uuuu uuuu uuuu uuuu

EEADRH xxxx xxxx uuuu uuuu uuuu uuuu

EECON1 x--- x000 u--- u000 u--- uuuu

EECON2 ---- ---- ---- ---- ---- ----

TABLE 11-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Power-on Reset,

Brown-out Reset

MCLR

Resets

WDT Reset

Wake-up via WDT or

Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends on condition,

r = reserved, maintain clear

Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).

2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector

(0004h).

3: See Table 11-5 for RESET value for specific condition.