Datasheet

© 2006 Microchip Technology Inc. DS30221C-page 7
PIC16F872
2.0 MEMORY ORGANIZATION
There are three memory blocks in the PIC16F872. The
Program Memory and Data Memory have separate
buses so that concurrent access can occur. Data mem-
ory is covered in this section; the EEPROM data mem-
ory and FLASH program memory blocks are detailed in
Section 3.0.
Additional information on device memory may be found
in the PICmicro™ Mid-Range Reference Manual
(DS33023).
2.1 Program Memory Organization
The PIC16F872 has a 13-bit program counter capable
of addressing an 8K word x 14 bit program memory
space. The PIC16F872 device actually has 2K words of
FLASH program memory. Accessing a location above
the physically implemented address will cause a wrap-
around.
The RESET vector is at 0000h and the interrupt vector
is at 0004h.
FIGURE 2-1: PIC16F872 PROGRAM
MEMORY MAP AND
STACK
2.2 Data Memory Organization
The data memory is partitioned into multiple banks
which contain the General Purpose Registers and the
Special Function Registers. Bits RP1 (STATUS<6>)
and RP0 (STATUS<5>) are the bank select bits.
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers, implemented as
static RAM. All implemented banks contain Special
Function Registers. Some frequently used Special
Function Registers from one bank may be mirrored in
another bank for code reduction and quicker access.
2.2.1 GENERAL PURPOSE REGISTER
FILE
The register file can be accessed either directly, or indi-
rectly through the File Select Register (FSR).
PC<12:0>
13
0000h
0004h
0005h
Stack Level 1
Stack Level 8
Reset Vector
Interrupt Vector
On-Chip
CALL, RETURN
RETFIE, RETLW
1FFFh
Stack Level 2
Program
Memory
Page 0
07FFh
RP1:RP0 Bank
00 0
01 1
10 2
11 3
Note: EEPROM Data Memory description can be
found in Section 4.0 of this data sheet.