Datasheet

PIC16F872
DS30221C-page 80 © 2006 Microchip Technology Inc.
REGISTER 10-2: ADCON1 REGISTER (ADDRESS: 9Fh)
U-0 U-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
ADFM
— — — PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
bit 7 ADFM: A/D Result Format Select bit
1 = Right justified. Six Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. Six Least Significant bits of ADRESL are read as ‘0’.
bit 6-4 Unimplemented: Read as '0'
bit 3-0 PCFG3:PCFG0: A/D Port Configuration Control bits:
Note 1: This column indicates the number of analog channels available as A/D inputs and
the number of analog channels used as voltage reference inputs.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown
A = Analog input
D = Digital I/O
PCFG3:
PCFG0
AN4
RA5
AN3
RA3
AN2
RA2
AN1
RA1
AN0
RA0
V
REF+VREF-
C
HAN/
Refs
(1)
0000 AAAAAVDD VSS 8/0
0001 AV
REF+A A A RA3VSS 7/1
0010 AAAAAV
DD VSS 5/0
0011 AV
REF+A A A RA3VSS 4/1
0100 DADAAV
DD VSS 3/0
0101 DV
REF+D A A RA3VSS 2/1
011x DDDDDV
DD VSS 0/0
1000 AV
REF+VREF-A A RA3RA2 6/2
1001 AAAAAV
DD VSS 6/0
1010 AV
REF+A A A RA3VSS 5/1
1011 AV
REF+VREF-A A RA3RA2 4/2
1100 AV
REF+VREF-A A RA3RA2 3/2
1101 DV
REF+VREF-A A RA3RA2 2/2
1110 DDDDAV
DD VSS 1/0
1111 DV
REF+VREF-D A RA3RA2 1/2