Datasheet

PIC16F870/871
DS30569C-page 88  2000-2013 Microchip Technology Inc.
REGISTER 11-1: CONFIGURATION WORD (ADDRESS 2007h)
(1)
CP1 CP0 DEBUG — WRT CPD LVP BOREN CP1 CP0 PWRTEN WDTEN FOSC1 FOSC0
bit 13 bit 0
bit 13-12,
bit 5-4
CP1:CP0: FLASH Program Memory Code Protection bits
(2)
11 = Code protection off
10 = Not supported
01 = Not supported
00 = Code protection on
bit 11 DEBUG: In-Circuit Debugger Mode
1 = In-Circuit Debugger disabled, RB6 and RB7 are general purpose I/O pins
0 = In-Circuit Debugger enabled, RB6 and RB7 are dedicated to the debugger
bit 10 Unimplemented: Read as ‘1’
bit 9 WRT: FLASH Program Memory Write Enable
1 = Unprotected program memory may be written to by EECON control
0 = Unprotected program memory may not be written to by EECON control
bit 8 CPD: Data EE Memory Code Protection
1 = Code protection off
0 = Data EEPROM memory code protected
bit 7 LVP: Low Voltage In-Circuit Serial Programming Enable bit
1 = RB3/PGM pin has PGM function, low voltage programming enabled
0 = RB3 is digital I/O, HV on MCLR
must be used for programming
bit 6 BOREN: Brown-out Reset Enable bit
(3)
1 = BOR enabled
0 = BOR disabled
bit 3 PWRTEN
: Power-up Timer Enable bit
(3)
1 = PWRT disabled
0 = PWRT enabled
bit 2 WDTEN: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
bit 1-0 FOSC1:FOSC0: Oscillator Selection bits
11 = RC oscillator
10 = HS oscillator
01 = XT oscillator
00 = LP oscillator
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
Note 1: The erased (unprogrammed) value of the configuration word is 3FFFh.
2: All of the CP1:CP0 pairs have to be given the same value to enable the code protection scheme listed.
3: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of bit
PWRTEN
. Ensure the Power-up Timer is enabled any time Brown-out Reset is enabled.