Datasheet

PIC16F870/871
DS30569C-page 132  2000-2013 Microchip Technology Inc.
FIGURE 14-10: PARALLEL SLAVE PORT TIMING (PIC16F871 ONLY)
TABLE 14-6: PARALLEL SLAVE PORT REQUIREMENTS (PIC16F871 ONLY)
Note: Refer to Figure 14-3 for load conditions.
RE2/CS
RE0/RD
RE1/WR
RD7:RD0
62
63
64
65
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
62 TdtV2wrH Data in valid before WR
 or CS (setup time) 20
25
—
—
—
—
ns
ns
Extended range only
63* TwrH2dtI WR
 or CS to data–in invalid (hold time) Standard(F)20——ns
Extended(LF)35 — — ns
64 TrdL2dtV RD
 and CS to data–out valid —
—
—
—
80
90
ns
ns
Extended range only
65 TrdH2dtI RD
 or CS to data–out invalid 10 — 30 ns
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.