Datasheet

 2000-2013 Microchip Technology Inc. DS30569C-page 129
PIC16F870/871
FIGURE 14-6: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
FIGURE 14-7: BROWN-OUT RESET TIMING
TABLE 14-3: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
30 TmcL MCLR
Pulse Width (low) 2 — — sVDD = 5V, -40°C to +85°C
31* T
WDT Watchdog Timer Time-out Period
(No Prescaler)
71833msVDD = 5V, -40°C to +85°C
32 T
OST Oscillation Start-up Timer Period — 1024 TOSC ——TOSC = OSC1 period
33* T
PWRT Power up Timer Period 28 72 132 ms VDD = 5V, -40°C to +85°C
34 T
IOZ I/O Hi-impedance from MCLR Low or
Watchdog Timer Reset
——2.1s
35 T
BOR Brown-out Reset pulse width 100 — — sVDD  VBOR (D005)
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
VDD
MCLR
Internal
POR
PWRT
Time-out
Osc
Time-out
Internal
RESET
Watchdog
Timer
Reset
33
32
30
31
34
I/O Pins
34
Note: Refer to Figure 14-3 for load conditions.
VDD
VBOR
35