Datasheet

PIC16F870/871
DS30569C-page 126  2000-2013 Microchip Technology Inc.
FIGURE 14-3: LOAD CONDITIONS
FIGURE 14-4: EXTERNAL CLOCK TIMING
VDD/2
C
L
RL
Pin Pin
V
SS
VSS
CL
RL = 464
C
L = 50 pF for all pins except OSC2, but including PORTD and PORTE outputs as ports
15 pF for OSC2 output
Note: PORTD and PORTE are not implemented on the PIC16F870.
Load condition 1
Load condition 2
OSC1
CLKO
Q4 Q1 Q2 Q3 Q4 Q1
1
2
3
3
4
4