Datasheet

2002-2013 Microchip Technology Inc. DS30487D-page 7
PIC16F87/88
FIGURE 1-2: PIC16F88 DEVICE BLOCK DIAGRAM
Flash
Program
Memory
4K x 14
13
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13-bit)
RAM
File
Registers
368 x 8
Direct Addr
7
RAM Addr
(1)
9
Addr MUX
Indirect
Addr
FSR reg
STATUS reg
MUX
ALU
W reg
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKI
OSC2/CLKO
RA5/MCLR
VDD, VSS
8
8
Brown-out
Reset
Note 1: Higher order bits are from the STATUS register.
2: The CCP1 pin is determined by the CCPMX bit in Configuration Word 1 register.
8
3
Comparators
Timer0
Data EE
256 Bytes
Timer1
CCP1
Timer2
AUSART
PORTA
PORTB
RA4/AN4/T0CKI/C2OUT
RB0/INT/CCP1
(2)
RA3/AN3/VREF+/C1OUT
RA2/AN2/CVREF/VREF-
RA1/AN1
RA0/AN0
RA5/MCLR/VPP
RA6/OSC2/CLKO
RB5/SS/TX/CK
RB4/SCK/SCL
RB3/PGM/CCP1
(2)
RB2/SDO/RX/DT
RB1/SDI/SDA
RB6/AN5/PGC/T1OSO/T1CKI
RB7/AN6/PGD/T1OSI
RA7/OSC1/CLKI
10-bit A/D
SSP