Datasheet

PIC16F87/88
DS30487D-page 36  2002-2013 Microchip Technology Inc.
FIGURE 4-2: CERAMIC RESONATOR
OPERATION (HS OR XT
OSC CONFIGURATION)
TABLE 4-2: CERAMIC RESONATORS
(FOR DESIGN GUIDANCE
ONLY)
4.3 External Clock Input
The ECIO Oscillator mode requires an external clock
source to be connected to the OSC1 pin. There is no
oscillator start-up time required after a Power-on
Reset, or after an exit from Sleep mode.
In the ECIO Oscillator mode, the OSC2 pin becomes
an additional general purpose I/O pin. The I/O pin
becomes bit 6 of PORTA (RA6). Figure 4-3 shows the
pin connections for the ECIO Oscillator mode.
FIGURE 4-3: EXTERNAL CLOCK INPUT
OPERATION
(ECIO CONFIGURATION)
Typical Capacitor Values Used:
Mode Freq OSC1 OSC2
XT 455 kHz
2.0 MHz
4.0 MHz
56 pF
47 pF
33 pF
56 pF
47 pF
33 pF
HS 8.0 MHz
16.0 MHz
27 pF
22 pF
27 pF
22 pF
Capacitor values are for design guidance only.
These capacitors were tested with the resonators
listed below for basic start-up and operation. These
values were not optimized.
Different capacitor values may be required to produce
acceptable oscillator operation. The user should test
the performance of the oscillator over the expected
V
DD and temperature range for the application.
See the notes following this table for additional
information.
Note: When using resonators with frequencies
above 3.5 MHz, the use of HS mode,
rather than XT mode, is recommended.
HS mode may be used at any V
DD for
which the controller is rated. If HS is
selected, it is possible that the gain of the
oscillator will overdrive the resonator.
Therefore, a series resistor should be
placed between the OSC2 pin and the
resonator. As a good starting point, the
recommended value of R
S is 330
Note 1: See Table 4-2 for typical values of C1 and
C2.
2: A series resistor (R
S) may be required.
3: R
F varies with the resonator chosen
(typically between 2 M to 10 M.
C1
(1)
C2
(1)
RES
OSC2
R
S
(2)
OSC1
RF
(3)
Sleep
To Internal
Logic
PIC16F87/88
OSC1/CLKI
I/O (OSC2)
RA6
Clock from
Ext. System
PIC16F87/88