Datasheet
2002-2013 Microchip Technology Inc. DS30487D-page 3
PIC16F87/88
Pin Diagrams (Cont’d)
16
2
RA2/AN2/CVREF
RA0/AN0
RA4/T0CKI/C2OUT
RA5/MCLR/VPP
NC
V
SS
NC
RB0/INT/CCP1
(2)
RB1/SDI/SDA
RA3/AN3/C1OUT
RA7/OSC1/CLKI
RA6/OSC2/CLKO
V
DD
NC
V
DD
RB7/PGD/T1OSI
RB6/PGC/T1OSO/T1CKI
RB5/SS/TX/CK
RB4/SCK/SCL
7
PIC16F87
1
3
6
5
4
15
21
19
20
17
18
22
28
26
27
23
24
25
14
8
10
9
13
12
11
VSS
NC
NC
RA1/AN1
RB2/SDO/RX/DT
RB3/PGM/CCP1
(2)
NC
NC
NC
16
2
RA2/AN2/CVREF/VREF-
RA0/AN0
RA4/AN4/T0CKI/C2OUT
RA5/MCLR/VPP
NC
V
SS
NC
RB0/INT/CCP1
(2)
RB1/SDI/SDA
RA3/AN3/V
REF+/C1OUT
RA7/OSC1/CLKI
RA6/OSC2/CLKO
V
DD
NC
V
DD
RB7/AN6/PGD/T1OSI
RB6/AN5/PGC/T1OSO/T1CKI
RB5/SS/TX/CK
RB4/SCK/SCL
7
PIC16F88
1
3
6
5
4
15
21
19
20
17
18
22
28
26
27
23
24
25
14
8
10
9
13
12
11
VSS
NC
NC
RA1/AN1
RB2/SDO/RX/DT
RB3/PGM/CCP1
(2)
NC
NC
NC
28-Pin QFN
(1)
28-Pin QFN
(1)
Note 1: For the QFN package, it is recommended that the bottom pad be connected to VSS.
2: The CCP1 pin is determined by the CCPMX bit in Configuration Word 1 register.