Datasheet

PIC16F87/88
DS30487D-page 22  2002-2013 Microchip Technology Inc.
2.2.2.6 PIE2 Register
The PIE2 register contains the individual enable bit for
the EEPROM write operation interrupt.
REGISTER 2-6: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2 (ADDRESS 8Dh)
R/W-0 R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0
OSFIE CMIE — EEIE — — — —
bit 7 bit 0
bit 7 OSFIE: Oscillator Fail Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 6 CMIE: Comparator Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 5 Unimplemented: Read as ‘0’
bit 4 EEIE: EEPROM Write Operation Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 3-0 Unimplemented: Read as ‘0’
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown