Datasheet

2002-2013 Microchip Technology Inc. DS30487D-page 137
PIC16F87/88
FIGURE 15-3: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD THROUGH
PULL-UP RESISTOR)
FIGURE 15-4: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD THROUGH
RC NETWORK): CASE 1
FIGURE 15-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR
TIED TO VDD THROUGH
RC NETWORK): CASE 2
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL
RESET
TPWRT
TOST
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST