Datasheet

2002-2013 Microchip Technology Inc. DS30487D-page 135
PIC16F87/88
TABLE 15-3: RESET CONDITION FOR SPECIAL REGISTERS
Condition
Program
Counter
STATUS
Register
PCON
Register
Power-on Reset 000h 0001 1xxx ---- --0x
MCLR
Reset during normal operation 000h 000u uuuu ---- --uu
MCLR
Reset during Sleep 000h 0001 0uuu ---- --uu
WDT Reset 000h 0000 1uuu ---- --uu
WDT Wake-up PC + 1 uuu0 0uuu ---- --uu
Brown-out Reset 000h 0001 1uuu ---- --u0
Interrupt Wake-up from Sleep PC + 1
(1)
uuu1 0uuu ---- --uu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
TABLE 15-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Power-on Reset,
Brown-out Reset
MCLR Reset,
WDT Reset
Wake-up via WDT or
Interrupt
W xxxx xxxx uuuu uuuu uuuu uuuu
INDF N/A N/A N/A
TMR0 xxxx xxxx uuuu uuuu uuuu uuuu
PCL 0000h 0000h PC + 1
(2)
STATUS 0001 1xxx 000q quuu
(3)
uuuq quuu
(3)
FSR xxxx xxxx uuuu uuuu uuuu uuuu
PORTA (PIC16F87)
PORTA (PIC16F88)
xxxx 0000
xxx0 0000
uuuu 0000
uuu0 0000
uuuu uuuu
uuuu uuuu
PORTB (PIC16F87)
PORTB (PIC16F87)
xxxx xxxx
00xx xxxx
uuuu uuuu
00uu uuuu
uuuu uuuu
uuuu uuuu
PCLATH ---0 0000 ---0 0000 ---u uuuu
INTCON 0000 000x 0000 000u uuuu uuuu
(1)
PIR1 -000 0000 -000 0000 -uuu uuuu
(1)
PIR2 00-0 ---- 00-0 ---- uu-u ----
(1)
TMR1L xxxx xxxx uuuu uuuu uuuu uuuu
TMR1H xxxx xxxx uuuu uuuu uuuu uuuu
T1CON -000 0000 -uuu uuuu -uuu uuuu
TMR2 0000 0000 0000 0000 uuuu uuuu
T2CON -000 0000 -000 0000 -uuu uuuu
SSPBUF xxxx xxxx uuuu uuuu uuuu uuuu
SSPCON 0000 0000 0000 0000 uuuu uuuu
CCPR1L xxxx xxxx uuuu uuuu uuuu uuuu
CCPR1H xxxx xxxx uuuu uuuu uuuu uuuu
CCP1CON --00 0000 --00 0000 --uu uuuu
RCSTA 0000 000x 0000 000x uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition
Note 1: One or more bits in INTCON, PIR1 and PR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
3: See Table 15-3 for Reset value for specific condition.