Datasheet

 2002-2013 Microchip Technology Inc. DS30487D-page 107
PIC16F87/88
FIGURE 11-7: ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
FIGURE 11-8: ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
TABLE 11-9: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Start
bit
bit 1bit 0 bit 8
bit 0Stop
bit
Start
bit
bit 8
RB2/SDO/RX/DT pin
Load RSR
Read
RCIF
Word 1
RCREG
Bit 8 = 0, Data Byte Bit 8 = 1, Address Byte
Note: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN = 1.
Stop
bit
Start
bit
bit 1bit 0
bit 8 bit 0Stop
bit
Start
bit bit 8
RB2/SDO/RX/DT pin
Load RSR
RCIF
Word 1
RCREG
Bit 8 = 1, Address Byte Bit 8 = 0, Data Byte
Note: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN was not updated and still = 0.
Read
Stop
bit
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR, BOR
Value on
all other
Resets
0Bh, 8Bh,
10Bh,18Bh
INTCON GIE PEIE
TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
0Ch PIR1
— ADIF
(1)
RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF -000 0000 -000 0000
18h RCSTA SPEN RX9
SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x
1Ah RCREG AUSART Receive Data Register 0000 0000 0000 0000
8Ch PIE1
— ADIE
(1)
RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE -000 0000 -000 0000
98h TXSTA
CSRC TX9 TXEN SYNC —BRGHTRMT TX9D 0000 -010 0000 -010
99h SPBRG Baud Rate Generator Register 0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Note 1: This bit is only implemented on the PIC16F88. The bit will read ‘0’ on the PIC16F87.