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PIC16F87/88

Clarifications/Corrections to the Data

Sheet:

In the Device Data Sheet (DS30487C), the following

clarifications and corrections should be noted. Any sili-

con issues related to the PIC16F87/88 will be reported

in a separate silicon errata. Please check the Microchip

web site for any existing issues.

1. Module: Oscillator Configurations

(INTRC and INTOSC)

Summary of Changes

• INTOSC Clock Source

- The Least Significant bit of the OSCTUNE

implemented.

- As a result, incrementing or decrementing

the OSCTUNE register will not have the

expected, single-step change on the

INTOSC frequency.

- When the INTOSC clock source is started,

the IOFS bit (OSCCON <2>) is clear, but it

becomes set in approximately 100 μs.

- The INTOSC clock frequency is stable

when the IOFS bit is set.

• INTRC Clock Source

- This 31 kHz, internal RC oscillator source

is a separate, fixed frequency. It is not

tunable.

These changes result in nine changes, detailed in

the clarification:

1. Page 38, Section 4.5.2 – Deletion and

modification of some text

2. Page 38, Register 4-1 – Modified some text

3. Page 41, Section 4.6.4 – Deleted and modified

text

4. Page 41, Section 4.6.5 – Deleted and modified

text

5. Page 42, Table 4-3 – Deleted and modified text

6. Page 43, Section 4.7.1 – Modified some text

7. Page 49, Table 4-4 – Note 1 revised

Change 1. Section 4.5.2

The second paragraph of Section 4.5.2

“OSCTUNE Register” is changed as shown.

When the OSCTUNE register is modified, the INTOSC

frequency will begin shifting to the new frequency. The

INTOSC clock will stabilize within 100 μs. Code execu-

tion continues during this shift. There is no indication

that the shift has occurred.

PIC16F87/88 Data Sheet Errata

Summary of content (8 pages)

PAGE 1
PIC16F87/88 PIC16F87/88 Data Sheet Errata Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS30487C), the following clarifications and corrections should be noted. Any silicon issues related to the PIC16F87/88 will be reported in a separate silicon errata. Please check the Microchip web site for any existing issues. 1.
PAGE 2
PIC16F87/88 Change 2. Register 4-1 The descriptions of bits<5:0> are modified, as highlighted by the change bars.
PAGE 3
PIC16F87/88 Change 3. Section 4.6.4 If the IRCF bits are modified while the internal oscillator is running at any other frequency than INTRC (31.25 kHz, IRCF<2:0> ≠ 000), the clock source is switched immediately and IOFS remains set. Section 4.6.4 “Modifying the IRCF Bits” is changed as shown. 4.6.4 MODIFYING THE IRCF BITS Change 4. Section 4.6.5 The IRCF bits can be modified at any time regardless of which clock source is currently being used as the system clock.
PAGE 4
PIC16F87/88 Change 6. Section 4.7.1 Change 7. Table 4-4 The second paragraph in Section 4.7.1 “RC_RUN Mode” is changed as shown. The note in Table 4-4 is changed as shown. If the system clock does not come from the INTRC (31.25 kHz) when the SCS bits are changed, and the IRCF bits in the OSCCON register are configured for a frequency other than INTRC, the frequency may not be stable immediately.
PAGE 5
PIC16F87/88 REVISION HISTORY Rev A Document (2/2008) Original release of this errata. Includes Data Sheet Clarification 1 (Oscillator Configurations, INTRC and INTOSC). © 2008 Microchip Technology Inc.
PAGE 7
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 8
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