Datasheet

PIC16F8X
DS30430B-page 80  1996 Microchip Technology Inc.
Applicable Devices F83 CR83 F84 CR84
FIGURE 11-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
TABLE 11-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER REQUIREMENTS
Parameter
No. Sym Characteristic Min Typ† Max Units Conditions
30 TmcL MCLR Pulse Width (low) 1000 * — — ns 2.0V ≤ VDD ≤ 6.0V
31 Twdt Watchdog Timer Time-out Period
(No Prescaler)
7 * 18 33 * ms VDD = 5.0V
32 Tost Oscillation Start-up Timer Period 1024TOSC ms TOSC = OSC1 period
33 Tpwrt Power-up Timer Period 28 * 72 132 * ms
VDD = 5.0V
34 TIOZ I/O Hi-impedance from MCLR Low
or reset
— — 100 * ns
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
RESET
Watchdog
Timer
RESET
33
32
30
31
34
I/O Pins
34