Datasheet

 2001-2013 Microchip Technology Inc. DS35007C-page 55
PIC16F84A
9.3.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 9-6: EXTERNAL CLOCK TIMING
OSC1
CLKOUT
Q4
Q1 Q2
Q3 Q4 Q1
13344
2
TABLE 9-2: EXTERNAL CLOCK TIMING REQUIREMENTS
Param No. Sym Characteristic Min Typ† Max Units Conditions
F
OSC External CLKIN Frequency
(1)
DC — 2 MHz XT, RC osc (-04, LF)
DC — 4 MHz XT, RC osc (-04)
DC — 20 MHz HS osc (-20)
DC — 200 kHz LP osc (-04, LF)
Oscillator Frequency
(1)
DC — 2 MHz RC osc (-04, LF)
DC — 4 MHz RC osc (-04)
0.1 — 2 MHz XT osc (-04, LF)
0.1 — 4 MHz XT osc (-04)
1.0 — 20 MHz HS osc (-20)
DC — 200 kHz LP osc (-04, LF)
1T
OSC External CLKIN Period
(1)
500 — — ns XT, RC osc (-04, LF)
250 — — ns XT, RC osc (-04)
50 — — ns HS osc (-20)
5.0 — — s LP osc (-04, LF)
Oscillator Period
(1)
500 — — ns RC osc (-04, LF)
250 — — ns RC osc (-04)
500 — 10,000 ns XT osc (-04, LF)
250 — 10,000 ns XT osc (-04)
50 — 1,000 ns HS osc (-20)
5.0 — — s LP osc (-04, LF)
2T
CY Instruction Cycle Time
(1)
0.2 4/FOSC DC s
3 TosL,
TosH
Clock in (OSC1) High or Low
Time
60 — — ns XT osc (-04, LF)
50 — — ns XT osc (-04)
2.0 — — s LP osc (-04, LF)
17.5 — — ns HS osc (-20)
4TosR,
TosF
Clock in (OSC1) Rise or Fall
Time
25 — — ns XT osc (-04)
50 — — ns LP osc (-04, LF)
7.5 — — ns HS osc (-20)
† Data in "Typ" column is at 5.0V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time-base period. All specified values
are based on characterization data for that particular oscillator type under standard operating conditions
with the device executing code. Exceeding these specified limits may result in an unstable oscillator opera-
tion and/or higher than expected current consumption. All devices are tested to operate at "Min." values
with an external clock applied to the OSC1 pin.
When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices.