Datasheet

 2001-2013 Microchip Technology Inc. DS35007C-page 31
PIC16F84A
6.10.2 WDT PROGRAMMING
CONSIDERATIONS
It should also be taken into account that under worst
case conditions (V
DD = Min., Temperature = Max., Max.
WDT Prescaler), it may take several seconds before a
WDT time-out occurs.
FIGURE 6-11: WATCHDOG TIMER BLOCK DIAGRAM
TABLE 6-7: SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER
From TMR0 Clock Source
(Figure 5-2)
To TMR0 (Figu re 5- 2)
Postscaler
WDT Timer
M
U
X
PSA
8 - to -1 MUX
PSA
WDT
Time-out
1
0
0
1
WDT
Enable Bit
PS2:PS0
•
•
8
MUX
Note: PSA and PS2:PS0 are bits in the OPTION_REG register.
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-on
Reset
Value on all
other
RESETS
2007h Config. bits
(2) (2) (2) (2) PWRTE
(1)
WDTE FOSC1 FOSC0 (2)
81h OPTION_REG
RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111
Legend: x = unknown. Shaded cells are not used by the WDT.
Note 1: See Register 6-1 for operation of the PWRTE
bit.
2: See Register 6-1 and Section 6.12 for operation of the code and data protection bits.