Datasheet

PIC16F818/819
DS39598F-page 12  2001-2013 Microchip Technology Inc.
FIGURE 2-4: PIC16F819 REGISTER FILE MAP
Indirect addr.(*)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
OPTION_REG
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
PIE1
PCON
PR2
SSPSTAT
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
20h
A0h
7Fh
FFh
Bank 0
Bank 1
File
Address
Indirect addr.(*)
Indirect addr.(*)
PCL
STATUS
FSR
PCLATH
INTCON
PCL
STATUS
FSR
PCLATH
INTCON
100h
101h
102h
103h
104h
105h
106h
107h
108h
109h
10Ah
10Bh
180h
181h
182h
183h
184h
185h
186h
187h
188h
189h
18Ah
18Bh
17Fh
1FFh
Bank 2
Bank 3
Indirect addr.(*)
TMR0
OPTION_REG
ADRESH
ADCON0 ADCON1
General
Purpose
Register
TRISB
PORTB
96 Bytes
10Ch
10Dh
10Eh
10Fh
110h
18Ch
18Dh
18Eh
18Fh
190h
EEDATA
EEADR
EECON1
EEDATH
EEADRH
Unimplemented data memory locations, read as ‘0’.
* Not a physical register.
Note 1: These registers are reserved; maintain these registers clear.
File
Address
File
Address
File
Address
SSPADD
120h
11Fh
1A0h
19Fh
General
Purpose
Register
80 Bytes
EFh
F0h
Accesses
70h-7Fh
Accesses
20h-7Fh
PIR2
PIE2
OSCCON
OSCTUNE
ADRESL
EECON2
Reserved
(1)
Reserved
(1)
16Fh
170h
Accesses
70h-7Fh
General
Purpose
Register
80 Bytes