Datasheet

 2001-2013 Microchip Technology Inc. DS39598F-page 107
PIC16F818/819
COMF Complement f
Syntax: [ label ] COMF f,d
Operands: 0  f  127
d  [0,1]
Operation: (f)  (destination)
Status Affected: Z
Description: The contents of register ‘f’ are
complemented. If ‘d’ = 0, the
result is stored in W. If ‘d’ = 1, the
result is stored back in register ‘f’.
DECF Decrement f
Syntax: [ label ] DECF f,d
Operands: 0  f  127
d  [0,1]
Operation: (f) – 1  (destination)
Status Affected: Z
Description: Decrement register ‘f’. If ‘d’ = 0,
the result is stored in the W
register. If ‘d’ = 1, the result is
stored back in register ‘f’.
DECFSZ Decrement f, Skip if 0
Syntax: [ label ] DECFSZ f,d
Operands: 0  f  127
d  [0,1]
Operation: (f) – 1  (destination);
skip if result = 0
Status Affected: None
Description: The contents of register ‘f’ are
decremented. If ‘d’ = 0, the result
is placed in the W register. If
‘d’ = 1, the result is placed back in
register ‘f’.
If the result is ‘1’, the next
instruction is executed. If the
result is ‘0’, then a NOP is
executed instead, making it a
2 T
CY instruction.
GOTO Unconditional Branch
Syntax: [ label ] GOTO k
Operands: 0  k  2047
Operation: k  PC<10:0>
PCLATH<4:3>  PC<12:11>
Status Affected: None
Description: GOTO is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits<10:0>. The
upper bits of PC are loaded
from PCLATH<4:3>. GOTO is a
two-cycle instruction.
INCF Increment f
Syntax: [ label ] INCF f,d
Operands: 0  f  127
d  [0,1]
Operation: (f) + 1  (destination)
Status Affected: Z
Description: The contents of register ‘f’ are
incremented. If ‘d’ = 0, the result
is placed in the W register. If
‘d’ = 1, the result is placed back in
register ‘f’.
INCFSZ Increment f, Skip if 0
Syntax: [ label ] INCFSZ f,d
Operands: 0  f  127
d  [0,1]
Operation: (f) + 1  (destination),
skip if result = 0
Status Affected: None
Description: The contents of register ‘f’ are
incremented. If ‘d’ = 0, the result is
placed in the W register. If ‘d’ = 1,
the result is placed back in
register ‘f’.
If the result is ‘1’, the next
instruction is executed. If the
result is ‘0’, a NOP is executed
instead, making it a 2 T
CY
instruction.