Datasheet

PIC16F785/HV785
DS41249E-page 86 © 2008 Microchip Technology Inc.
12.2 A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
HOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 12-4. The
source impedance (R
S) and the internal sampling
switch (R
SS) impedance directly affect the time
required to charge the capacitor C
HOLD. The sampling
switch (R
SS) impedance varies over the device voltage
(V
DD), see Figure 12-4. The maximum recom-
mended impedance for analog sources is 10 kΩ. As
the impedance is decreased, the acquisition time may
be decreased. After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
To calculate the minimum acquisition time,
Equation 12-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
EQUATION 12-1: ACQUISITION TIME EXAMPLE
Note 1: The reference voltage (VREF) has no effect on the equation, since it cancels itself out.
2: The charge holding capacitor (C
HOLD) is not discharged after each conversion.
3: The maximum recommended impedance for analog sources is 10 kΩ. This is required to meet the pin
leakage specification.
TACQ Amplifier Settling Time Hold Capacitor Charging Time Temperature Coefficient++=
T
AMP Tc TCOFF++=
5µs Tc Temperature - 25°C()0.05µs/°C()[]++=
TcCHOLD Ric Rss Rs++() ln(1/2047)=
10pF 1k
Ω
7k
Ω
10k
Ω
++() ln(0.0004885)=
1.37
= µs
Tacq 5µs 1.37µs 50°C- 25°C()0.05µs/°C()[]++=
7.62µs=
VAPPLIED 1e
Tc
RC
---------
⎝⎠
⎜⎟
⎛⎞
VAPPLIED 1
1
2047
------------
⎝⎠
⎛⎞
=
VAPPLIED 1
1
2047
------------
⎝⎠
⎛⎞
VCHOLD=
VAPPLIED 1e
TC
RC
----------
⎝⎠
⎜⎟
⎛⎞
VCHOLD=
;[1] Vchold charged to within 1/2 lsb
;[2] Vchold charge response to Vapplied
;Combining [1] and [2]
The value for Tc can be approximated with the following equations:
Solving for Tc:
Therefore:
Temperature 50°C and external impedance of 10k
Ω
5.0V VDD=
Assumptions: