Datasheet

© 2008 Microchip Technology Inc. DS41249E-page 73
PIC16F785/HV785
10.2 VR Reference Module
The VR Reference module generates a 1.2V nominal
output voltage for use by the ADC and comparators.
The output voltage can also be brought out to the V
REF
pin for user applications. This module uses a bandgap
as a reference. See Table 19-9 for detailed specifica-
tions. Register 10-2 shows the control register for the
VR module.
REGISTER 10-2: REFCON: VOLTAGE REFERENCE CONTROL REGISTER
U-0 U-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0
— — BGST VRBB VREN VROE CVROE —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5 BGST: Band Gap Reference Voltage Stable Flag bit
1 = Reference is stable
0 = Reference is not stable
bit 4 VRBB: Voltage Reference Buffer Bypass bit
1 = V
REF output is not buffered. Power is removed from buffer amplifier.
0 = V
REF output is buffered
(1)
bit 3 VREN: Voltage Reference Enable bit (VR = 1.2V nominal)
(2)
1 = VR reference is enabled
0 = VR reference is disabled and does not consume any current
bit 2 VROE: Voltage Reference Output Enable bit
If CVROE =
0:
1 = VREF output on RA1/AN1/C12IN0-/VREF/ICSPCLK pin is 1.2 volt VR analog reference
0 = Disabled, 1.2 volt VR analog reference is used internally only
If CVROE =
1:
VROE has no effect.
bit 1 CVROE: Comparator Voltage Reference Output Enable bit (see Figure 10-2)
1 = V
REF output on RA1/AN1/C12IN0-/VREF/ICSPCLK pin is CVREF voltage
0 = V
REF output on RA1/AN1/C12IN0-/VREF/ICSPCLK pin is controlled by VROE
bit 0 Unimplemented: Read as ‘0’
Note 1: Buffer amplifier common mode limitations require V
REF ≤ (VDD - 1.4)V for buffered output.
2: VREN is fixed high for PIC16HV785 device.