Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller SSOP 20 8-Bit 20 MHz I/O number 17

PIC16F785/HV785

8.1 Capture Mode

In Capture mode, CCPR1H:CCPR1L captures the

16-bit value of the TMR1 register when an event occurs

on pin RC5/CCP1. An event is defined as one of the

following and is configured by CCP1CON<3:0>:

• Every falling edge

• Every rising edge

• Every 4th rising edge

• Every 16th rising edge

When a capture is made, the interrupt request flag bit

CCP1IF of the PIR1 Register is set. The interrupt flag

must be cleared in software. If another capture occurs

before the value in register CCPR1 is read, the old cap-

tured value is overwritten by the new captured value.

8.1.1 CCP1 PIN CONFIGURATION

In Capture mode, the RC5/CCP1 pin should be config-

ured as an input by setting the TRISC<5> bit.

FIGURE 8-1: CAPTURE MODE

OPERATION BLOCK

DIAGRAM

8.1.2 TIMER1 MODE SELECTION

Timer1 must be running in Timer mode or Synchro-

nized Counter mode for the CCP module to use the

capture feature. In Asynchronous Counter mode, the

capture operation may not work.

8.1.3 SOFTWARE INTERRUPT

When the Capture mode is changed, a false capture

interrupt may be generated. The user should keep bit

CCP1IE of the PIE1 Register clear to avoid false inter-

rupts and should clear the flag bit CCP1IF of the PIR1

8.1.4 CCP PRESCALER

There are four prescaler settings specified by bits

CCP1M<3:0> of the CCP1CON Register. Whenever

the CCP module is turned off, or the CCP module is not

in Capture mode, the prescaler counter is cleared. Any

Reset will clear the prescaler counter.

Switching from one capture prescaler to another may

generate an interrupt. Also, the prescaler counter will

not be cleared, therefore, the first capture may be from

a non-zero prescaler. Example 8-1 shows the recom-

mended method for switching between capture pres-

calers. This example also clears the prescaler counter

and will not generate the “false” interrupt.

EXAMPLE 8-1: CHANGING BETWEEN

CAPTURE PRESCALERS

8.2 Compare Mode

In Compare mode, the 16-bit CCPR1 register value is

constantly compared against the TMR1 register pair

value. When a match occurs, the RC5/CCP1 pin is:

• Driven high

•Driven low

• Remains unchanged

The action on the pin is based on the value of control

bits CCP1M<3:0> of the CCP1CON Register. At the

same time, interrupt flag bit CCP1IF of the PIR1 Regis-

ter is set.

FIGURE 8-2: COMPARE MODE

OPERATION BLOCK

DIAGRAM

Note: If the RC5/CCP1 pin is configured as an

output, a write to the port can cause a

capture condition.

CCPR1H CCPR1L

TMR1H TMR1L

Set Flag bit CCP1IF

(PIR1<5>)

Capture

Enable

Q’s

CCP1CON<3:0>

Prescaler

÷ 1, 4, 16

and

Edge Detect

RC5/CCP1

CLRF CCP1CON ;Turn CCP module off

MOVLW NEW_CAPT_PS ;Load the W reg with

; the new prescaler

; move value and CCP ON

MOVWF CCP1CON ;Load CCP1CON with this

; value

CCPR1H CCPR1L

TMR1H TMR1L

Comparator

Output

Logic

Special Event Trigger

Set Flag bit CCP1IF

(PIR1<5>)

Match

TRISC<5>

CCP1CON<3:0>

Mode Select

Output Enable

Special Event Trigger will:

• clear TMR1H and TMR1L registers

• NOT set interrupt flag bit TMR1F (PIR1<0>)

• set the GO/DONE

bit (ADCON0<1>)

RC5/CCP1