Datasheet
© 2008 Microchip Technology Inc. DS41249E-page 45
PIC16F785/HV785
4.4 PORTC and TRISC Registers
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISC (Register 4-
8). Setting a TRISC bit (= 1) will make the correspond-
ing PORTC pin an input (i.e., put the corresponding
output driver in a High-Impedance mode). Clearing a
TRISC bit (= 0) will make the corresponding PORTC
pin an output (i.e., put the contents of the output latch
on the selected pin). Example 4-3 shows how to initial-
ize PORTC.
Reading the PORTC register (Register 4-7) reads the
status of the pins, whereas writing to it will write to the
port latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the port data latch.
The TRISC register controls the direction of the
PORTC pins, even when they are being used as
analog inputs. The user must ensure the bits in the
TRISC register are maintained set when using them as
analog inputs. I/O pins configured as analog input
always read ‘0’.
When RC4 or RC5 is configured as an op amp output,
the corresponding RC4 or RC5 digital output driver will
automatically be disabled regardless of the TRISC<4>
or TRISC<5> value.
EXAMPLE 4-3: INITIALIZING PORTC
REGISTER 4-7: PORTC: PORTC REGISTER
REGISTER 4-8: TRISC: PORTC TRI-STATE REGISTER
Note: The ANSEL0 (91h) and ANSEL1 (93h)
registers must be initialized to configure
an analog channel as a digital input. Pins
configured as analog inputs will read ‘0’.
BCF STATUS,RP0 ;Bank 0
BCF STATUS,RP1
CLRF PORTC ;Init PORTC
BSF STATUS,RP0 ;Bank 1
CLRF ANSEL0 ;digital I/O
CLRF ANSEL1 ;digital I/O
MOVLW 0Ch ;Set RC<3:2> as inputs
MOVWF TRISC ; and set RC<5:4,1:0>
; as outputs
BCF STATUS,RP0 ;Bank 0
R/W-x
(1)
R/W-x
(1)
R/W-x R/W-x R/W-x
(1)
R/W-x
(1)
R/W-x
(1)
R/W-x
(1)
RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 RC<7:0>: PORTC General Purpose I/O Pin bits
1 = Port pin is greater than V
IH
0 = Port pin is less than VIL
Note 1: Data latches are unknown after a POR, but each port bit reads ‘0’ when the corresponding analog select bit
is ‘1’ (see Registers
12-1 and 12-2 on page 82).
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-0 TRISC<7:0>: PORTC Tri-State Control bits
1 = PORTC pin configured as an input (tri-stated)
0 = PORTC pin configured as an output