Datasheet

PIC16F785/HV785
DS41249E-page 42 © 2008 Microchip Technology Inc.
4.3 PORTB and TRISB Registers
PORTB is a 4-bit wide, bidirectional port. The corre-
sponding data direction register is TRISB (Register 4-
6). Setting a TRISB bit (= 1) will make the correspond-
ing PORTB pin an input (i.e., put the corresponding
output driver in a High-Impedance mode). Clearing a
TRISB bit (= 0) will make the corresponding PORTB
pin an output (i.e., put the contents of the output latch
on the selected pin). Example 4-2 shows how to initial-
ize PORTB.
Reading the PORTB register (Register 4-5) reads the
status of the pins, whereas writing to it will write to the
port latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then writ-
ten to the port data latch.
Pin RB6 is an open drain output. All other PORTB pins
have full CMOS output drivers.
The TRISB register controls the direction of the
PORTB pins, even when they are being used as ana-
log inputs. The user must ensure the bits in the TRISB
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
EXAMPLE 4-2: INITIALIZING PORTB
REGISTER 4-5: PORTB: PORTB REGISTER
REGISTER 4-6: TRISB: PORTB TRI-STATE REGISTER
Note: The ANSEL1 (93h) register must be initial-
ized to configure an analog channel as a
digital input. Pins configured as analog
inputs will read ‘0’.
BCF STATUS,RP0 ;Bank 0
BCF STATUS,RP1 ;
CLRF PORTB ;Init PORTB
BSF STATUS,RP0 ;Bank 1
BCF ANSEL1,2 ;digital I/O - RB4
BCF ANSEL1,3 ;digital I/O - RB5
MOVLW 30h ;Set RB<5:4> as inputs
MOVWF TRISB ;and set RB<7:6>
;as outputs
BCF STATUS,RP0 ;Bank 0
R/W-x R/W-x R/W-x
(1)
R/W-x
(1)
U-0 U-0 U-0 U-0
RB7 RB6 RB5 RB4
— — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4
RB<7:4>: PORTB General Purpose I/O Pin bits
1 = Port pin is greater than V
IH
0 = Port pin is less than VIL
bit 3-0
Unimplemented: Read as ‘0’
Note 1: Data latches are unknown after a POR, but each port bit reads ‘0’ when the corresponding analog select bit is
‘1’ (see Register 12-2 on page 82).
R/W-1 R/W-1 R/W-1 R/W-1 U-0 U-0 U-0 U-0
TRISB7 TRISB6 TRISB5 TRISB4
— — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-4
TRISB<7:4>: PORTB Tri-State Control bits
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
bit 3-0
Unimplemented: Read as ‘0’