Datasheet

© 2008 Microchip Technology Inc. DS41249E-page 153
PIC16F785/HV785
TABLE 19-3: PRECISION INTERNAL OSCILLATOR PARAMETERS
FIGURE 19-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
Param
No.
Sym Characteristic
Freq.
Tolerance
Min Typ† Max Units Conditions
F10 FOSC Internal Calibrated
INTOSC Frequency
(1)
±1% 7.92 8.00 8.08 MHz VDD = 3.5V, 25°C
±2% 7.84 8.00 8.16 MHz 2.5V ≤ V
DD ≤ 5.5V
0°C ≤ T
A ≤ +85°C
±5% 7.60 8.00 8.40 MHz 2.0V ≤ VDD ≤ 5.5V
-40°C ≤ T
A ≤ +85°C (Ind.)
-40°C ≤ T
A ≤ +125°C (Ext.)
F14 TIOSCST Oscillator wake-up from
Sleep start-up time*
— — 12 24 μsVDD = 2.0V, -40°C to +85°C
——714μsV
DD = 3.0V, -40°C to +85°C
——611μsVDD = 5.0V, -40°C to +85°C
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: To ensure these oscillator frequency tolerances, V
DD and VSS must be capacitively decoupled as close to
the device as possible. 0.1 uF and 0.01 uF values in parallel are recommended.
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
34
I/O Pins
34