Datasheet

© 2008 Microchip Technology Inc. DS41249E-page 151
PIC16F785/HV785
FIGURE 19-3: EXTERNAL CLOCK TIMING
TABLE 19-1: EXTERNAL CLOCK TIMING REQUIREMENTS
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
F
OSC External CLKIN Frequency
(1)
— 32.768 — kHz LP mode (complementary input
only)
DC — 4 MHz XT mode
DC — 20 MHz HS mode
DC — 20 MHz EC mode
Oscillator Frequency
(1)
— 32.768 — kHz LP Osc mode
—4 —MHzINTOSC mode
DC — 4 MHz RC Osc mode
0.1 — 4 MHz XT Osc mode
1— 20MHzHS Osc mode
1
T
OSC External CLKIN Period
(1)
—0.3052 — μs LP mode (complementary input
only)
50 — ∞ ns HS Osc mode
50 — ∞ ns EC Osc mode
250 — ∞ ns XT Osc mode
Oscillator Period
(1)
—0.3052 — μsLP Osc mode
—250 — nsINTOSC mode
250 — — ns RC Osc mode
250 — 10,000 ns XT Osc mode
50 — 1,000 ns HS Osc mode
2T
CY Instruction Cycle Time
(1)
200 TCY DC ns TCY = 4/FOSC
3 TosL,
TosH
External CLKIN (OSC1) High
External CLKIN Low
2* — — μsLP oscillator, TOSC L/H duty cycle
20* — — ns HS oscillator, TOSC L/H duty cycle
100 * — — ns XT oscillator, T
OSC L/H duty cycle
4TosR,
TosF
External CLKIN Rise
External CLKIN Fall
— — 50* ns LP oscillator
— — 25* ns XT oscillator
— — 15* ns HS oscillator
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: Instruction cycle period (T
CY) equals four times the input oscillator time base period. All specified values
are based on characterization data for that particular oscillator type under standard operating conditions
with the device executing code. Exceeding these specified limits may result in an unstable oscillator
operation and/or higher than expected current consumption. All devices are tested to operate at ‘min’
values with an external clock applied to OSC1 pin. When an external clock input is used, the ‘max’ cycle
time limit is ‘DC’ (no clock) for all devices.
OSC1
CLKOUT
Q4 Q1 Q2 Q3 Q4 Q1
1
2
3
3
4
4