Datasheet
© 2008 Microchip Technology Inc. DS41249E-page 133
PIC16F785/HV785
RETFIE Return from Interrupt
Syntax: [ label ] RETFIE
Operands: None
Operation: TOS → PC,
1 → GIE
Status Affected: None
Encoding:
00 0000 0000 1001
Description: Return from Interrupt. Stack is
POPed and Top-of-Stack (TOS)
is loaded in the PC. Interrupts are
enabled by setting Global
Interrupt Enable bit, GIE of the
INTCON Register. This is a two-
cycle instruction.
RETLW Return with Literal in W
Syntax: [ label ] RETLW k
Operands: 0 ≤ k ≤ 255
Operation: k → (W);
TOS → PC
Status Affected: None
Encoding:
11 01xx kkkk kkkk
Description: The W register is loaded with
the eight-bit literal ‘k’. The pro-
gram counter is loaded from the
top of the stack (the return
address). This is a two-cycle
instruction.
RETURN Return from Subroutine
Syntax: [ label ] RETURN
Operands: None
Operation: TOS → PC
Status Affected: None
Description: Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
RLF Rotate Left f through Carry
Syntax: [ label ] RLF f,d
Operands: 0 ≤ f ≤ 127
d ∈ [0,1]
Operation: See description below
Status Affected: C
Encoding:
00 1101 dfff ffff
Description: The contents of register ‘f’ are
rotated one bit to the left through
the Carry Flag. If ‘d’ is ‘0’, the
result is placed in the W register.
If ‘d’ is ‘1’, the result is stored
back in register ‘f’.
RRF Rotate Right f through Carry
Syntax: [ label ] RRF f,d
Operands: 0 ≤ f ≤ 127
d ∈ [0,1]
Operation: See description below
Status Affected: C
Encoding:
00 1100 dfff ffff
Description: The contents of register ‘f’ are
rotated one bit to the right
through the Carry Flag. If ‘d’ is
‘0’, the result is placed in the W
register. If ‘d’ is ‘1’ the result is
placed back in register ‘f’.
SLEEP Go into Standby mode
Syntax: [label] SLEEP
Operands: None
Operation: 00h → WDT,
0 → WDT prescaler,
1 → TO
,
0 → PD
Status Affected: TO, PD
Encoding:
00 0000 0110 0011
Description: The power-down Status bit, PD
is cleared. Time out Status bit,
TO
is set. Watchdog Timer and
its prescaler are cleared.
The processor is put into Sleep
mode with the oscillator
stopped.
Register fC
REGISTER FC