Datasheet
PIC16F785/HV785
DS41249E-page 114 © 2008 Microchip Technology Inc.
TABLE 15-4: INITIALIZATION CONDITION FOR REGISTERS
Register Address Power-on Reset
MCLR
Reset
WDT Reset
Brown-out Reset
(1)
Wake-up from Sleep through interrupt
Wake-up from Sleep through WDT Time-out
W—xxxx xxxx uuuu uuuu
uuuu uuuu
INDF 00h/80h xxxx xxxx xxxx xxxx
uuuu uuuu
TMR0 01h xxxx xxxx uuuu uuuu
uuuu uuuu
PCL 02h/82h 0000 0000 0000 0000
PC + 1
(3)
STATUS 03h/83h 0001 1xxx 000q quuu
(4)
uuuq quuu
(4)
FSR 04h/84h xxxx xxxx uuuu uuuu
uuuu uuuu
PORTA 05h --x0 x000
(6)
--u0 u000
(7)
--uu uuuu
PORTB 06h xx00 ----
(6)
uu00 ----
(7)
uuuu ----
PORTC 07h 00xx 0000
(6)
00uu uuuu
(7)
uuuu uuuu
PCLATH 0Ah/8Ah ---0 0000 ---0 0000
---u uuuu
INTCON 0Bh/8Bh 0000 0000 0000 0000
uuuu uuuu
(2)
PIR1 0Ch 0000 0000 0000 0000
uuuu uuuu
(2)
TMR1L 0Eh xxxx xxxx uuuu uuuu
uuuu uuuu
TMR1H 0Fh xxxx xxxx uuuu uuuu
uuuu uuuu
T1CON 10h 0000 0000 uuuu uuuu
uuuu uuuu
TMR2 11h 0000 0000 0000 0000
uuuu uuuu
T2CON 12h -000 0000 -000 0000
-uuu uuuu
CCPR1L 13h xxxx xxxx uuuu uuuu
uuuu uuuu
CCPR1H 14h xxxx xxxx uuuu uuuu
uuuu uuuu
CCP1CON 15h --00 0000 --00 0000
--uu uuuu
WDTCON 18h ---0 1000 ---0 1000
---u uuuu
ADRESH 1Eh xxxx xxxx uuuu uuuu
uuuu uuuu
ADCON0 1Fh 0000 0000 0000 0000
uuuu uuuu
OPTION_REG 81h 1111 1111 1111 1111
uuuu uuuu
TRISA 85h --11 1111 --11 1111
--uu uuuu
TRISB 86h 1111 ---- 1111 ----
uuuu ----
TRISC 87h 1111 1111 1111 1111
uuuu uuuu
PIE1 8Ch 0000 0000 0000 0000
uuuu uuuu
PCON 8Eh ---1 --0x ---u --uq
(1,5)
---u --uu
OSCCON 8Fh -110 q000 -110 q000
-uuu uuuu
OSCTUNE 90h ---0 0000 ---u uuuu
---u uuuu
ANSEL0 91h 1111 1111 1111 1111
uuuu uuuu
PR2 92h 1111 1111 1111 1111
1111 1111
ANSEL1 93h ---- 1111 ---- 1111
---- uuuu
WPUA 95h --11 1111 --11 1111
--uu uuuu
IOCA 96h --00 0000 --00 0000
--uu uuuu
REFCON 98h --00 000- --00 000-
--uu uuu-
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If V
DD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
4: See Table 15-5 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
6: Analog channels read 0 but data latches are unknown.
7: Analog channels read 0 but data latches are unchanged.