Datasheet

© 2008 Microchip Technology Inc. DS41249E-page 109
PIC16F785/HV785
15.2 Reset
The PIC16F785/HV785 differentiates between various
kinds of Reset:
• Power-on Reset (POR)
• WDT Reset during normal operation
• WDT Reset during Sleep
•MCLR
Reset during normal operation
•MCLR Reset during Sleep
• Brown-out Reset (BOR)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
•MCLR
Reset
•MCLR
Reset during Sleep
•WDT Reset
• Brown-out Reset (BOR)
They are not affected by a WDT wake-up since this is
viewed as the resumption of normal operation. TO
and
PD
bits are set or cleared differently in different Reset
situations, as indicated in Table 15-2. These bits are
used in software to determine the nature of the Reset.
See Table 15-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 15-1.
The MCLR
Reset path has a noise filter to detect and
ignore small pulses. See Section 19.0 “Electrical
Specifications” for pulse width specifications.
FIGURE 15-1: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
S
R
Q
External
Reset
MCLR/VPP pin
V
DD
OSC1/
WDT
Module
V
DD Rise
Detect
OST/PWRT
LFINTOSC
WDT
Time-out
Power-on Reset
OST
10-bit Ripple Counter
PWRT
Chip_Reset
11-bit Ripple Counter
Reset
Enable OST
Enable PWRT
Sleep
Brown-out
(1)
Reset
SBOREN
BOREN
CLKI pin
Note 1: Refer to the Configuration Word register (Register 15.2).