Datasheet

 2003-2013 Microchip Technology Inc. DS30498D-page 63
PIC16F7X7
FIGURE 5-15: BLOCK DIAGRAM OF RB7/PGD PIN
Data Latch
From other
RBPU
(1)
P
V
DD
I/O pin
QD
CK
QD
CK
QD
EN
QD
EN
Data Bus
WR PORTB
Set RBIF
TRIS Latch
RD TRISB
RD PORTB
RB7:RB4 pins
Weak
Pull-up
RD PORTB
Latch
Q3
Q1
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU
bit.
PGD
PGD
1
0
Port/Program Mode/ICD
TTL
Input Buffer
1
0
PGD DRVEN
Program Mode/ICD
WR TRISB