Datasheet

PIC16F7X7
DS30498D-page 62 2003-2013 Microchip Technology Inc.
FIGURE 5-14: BLOCK DIAGRAM OF RB6/PGC PIN
Data Latch
From other
RBPU
(1)
P
V
DD
I/O pin
QD
CK
QD
CK
QD
EN
QD
EN
Data Bus
WR PORTB
WR TRISB
Set RBIF
TRIS Latch
RD TRISB
RD PORTB
RB7:RB4 pins
Weak
Pull-up
RD PORTB
Latch
Q3
Q1
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU
bit.
TTL
Input Buffer
Schmitt Trigger
Buffer
PGC
Program Mode/ICD
Program Mode/ICD