Datasheet

 2003-2013 Microchip Technology Inc. DS30498D-page 269
PIC16F7X7
Device Differences............................................................ 265
Device Overview ................................................................... 5
Features........................................................................ 5
Direct Addressing................................................................30
E
Electrical Characteristics................................................... 205
Errata ....................................................................................4
External Clock Input............................................................ 34
F
Fail-Safe Clock Monitor............................................. 169, 189
FSR Register ...................................................................... 30
I
I/O Ports..............................................................................49
I
2
Mode
Operation .................................................................. 106
I
2
Slave Mode
Clock Stretching, 10-bit Receive
Mode (SEN = 1)................................................ 112
Clock Stretching, 10-bit Transmit Mode.................... 112
Clock Stretching, 7-bit Receive Mode (SEN = 1)...... 112
Clock Stretching, 7-bit Transmit Mode...................... 112
I
2
C Master Mode...............................................................117
Clock Arbitration........................................................120
Operation .................................................................. 118
Reception.................................................................. 123
Repeated Start Condition Timing.............................. 122
Start Condition Timing .............................................. 121
Transmission.............................................................123
I
2
C Mode...........................................................................102
ACK
Pulse......................................................... 106, 107
Acknowledge Sequence Timing................................ 126
Baud Rate Generator................................................ 119
Bus Collision
Repeated Start Condition ................................. 130
Start Condition .................................................. 128
Stop Condition .................................................. 131
Clock Synchronization and the CKP Bit....................113
Effect of a Reset ....................................................... 127
General Call Address Support ..................................116
Multi-Master Communication, Bus Collision
and Arbitration .................................................. 127
Multi-Master Mode .................................................... 127
Read/Write Bit Information (R/W
Bit) ........................107
Registers................................................................... 102
Serial Clock (RC3/SCK/SCL)....................................107
Sleep Operation........................................................ 127
Stop Condition Timing............................................... 126
I
2
C Slave Mode................................................................. 106
Addressing................................................................ 106
Clock Stretching........................................................ 112
Reception.................................................................. 107
Transmission.............................................................107
ID Locations .............................................................. 169, 192
In-Circuit Debugger........................................................... 192
In-Circuit Serial Programming...........................................169
In-Circuit Serial Programming (ICSP)...............................192
INDF Register ..................................................................... 30
Indirect Addressing ............................................................. 30
FSR Register ..............................................................15
Instruction Set
Firmware Instructions ............................................... 193
General Format ........................................................ 193
Opcode Field Descriptions ....................................... 193
Read-Modify-Write Operations ................................. 193
ADDLW..................................................................... 195
ADDWF .................................................................... 195
ANDLW..................................................................... 195
ANDWF .................................................................... 195
BCF .......................................................................... 195
BSF........................................................................... 195
BTFSC...................................................................... 195
BTFSS...................................................................... 195
CALL......................................................................... 196
CLRF ........................................................................ 196
CLRW....................................................................... 196
CLRWDT .................................................................. 196
COMF....................................................................... 196
DECF........................................................................ 196
DECFSZ ................................................................... 197
GOTO....................................................................... 197
INCF ......................................................................... 197
INCFSZ..................................................................... 197
IORLW...................................................................... 197
IORWF...................................................................... 197
MOVF ....................................................................... 198
MOVLW.................................................................... 198
MOVWF.................................................................... 198
NOP.......................................................................... 198
RETFIE..................................................................... 198
RETLW..................................................................... 198
RETURN................................................................... 199
RLF........................................................................... 199
RRF .......................................................................... 199
SLEEP...................................................................... 199
SUBLW..................................................................... 199
SUBWF..................................................................... 199
SWAPF..................................................................... 200
XORLW .................................................................... 200
XORWF .................................................................... 200
Summary Table ........................................................ 194
INT Interrupt (RB0/INT). See Interrupt Sources.
INTCON Register
GIE Bit ........................................................................ 23
INT0IE Bit ................................................................... 23
INT0IF Bit ................................................................... 23
PEIE Bit ...................................................................... 23
RBIF Bit ................................................................ 23, 56
TMR0IE Bit ................................................................. 23
Inter-Integrated Circuit. See I
2
C.
Internal Oscillator Block...................................................... 35
INTRC Modes............................................................. 36
Internet Address ............................................................... 275
Interrupt Sources ...................................................... 169, 184
A/D Conversion Complete ........................................ 155
Interrupt-on-Change (RB7:RB4)................................. 56
RB0/INT Pin, External .............................................. 185
TMR0 Overflow......................................................... 185
Interrupts
Exiting Sleep with ....................................................... 48
Synchronous Serial Port Interrupt .............................. 25
Interrupts, Context Saving During..................................... 185