Datasheet

 2003-2013 Microchip Technology Inc. DS30498D-page 153
PIC16F7X7
REGISTER 12-2: ADCON1: A/D CONTROL REGISTER 1 (ADDRESS 9Fh)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
ADFM ADCS2 VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
bit 7 ADFM: A/D Result Format Select bit
1 = Right justified. Six Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. Six Least Significant bits of ADRESL are read as ‘0’.
bit 6 ADCS2: A/D Clock Divide by 2 Select bit
1 = A/D clock source is divided by two when system clock is used
0 = Disabled
bit 5 VCFG1: Voltage Reference Configuration bit 1
0 = V
REF- is connected to VSS
1 = V
REF- is connected to external VREF- (RA2)
bit 4 VCFG0: Voltage Reference Configuration bit 0
0 = VREF+ is connected to VDD
1 = V
REF+ is connected to external VREF+ (RA3)
bit 3-0 PCFG<3:0>: A/D Port Configuration bits
Note: AN5 through AN7 are only available on the 40-pin product variant (PIC16F747 and
PIC16F777).
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
AN13 AN12 AN11 AN10 AN9 AN8 AN7 AN6 AN5 AN4 AN3 AN2 AN1 AN0
0000 A A A A AAAAAAAAAA
0001 A A A A AAAAAAAAAA
0010 D A A A AAAAAAAAAA
0011 D D A A AAAAAAAAAA
0100 D D D A AAAAAAAAAA
0101 D D D D AAAAAAAAAA
0110 D D D D DAAAAAAAAA
0111 D D D D DDAAAAAAAA
1000 D D D D DDDAAAAAAA
1001 D D D D DDDDAAAAAA
1010 D D D D DDDDDAAAAA
1011 D D D D DDDDDDAAAA
1100 D D D D DDDDDDDAAA
1101 D D D D DDDDDDDDAA
1110 D D D D DDDDDDDDDA
1111 D D D D DDDDDDDDDD
Legend: A = Analog input, D = Digital I/O