Datasheet

 2004 Microchip Technology Inc. DS30498C-page 51
PIC16F7X7
FIGURE 5-3: BLOCK DIAGRAM OF RA2/AN2/VREF-/CVREF PIN
FIGURE 5-4: BLOCK DIAGRAM OF RA4/T0CKI/C1OUT PIN
Data
Bus
Q
D
Q
CK
P
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
Analog
V
SS
VDD
RA2/AN2/VREF-/
QD
Q
CK
DQ
EN
To Comparator
TTL
Input Buffer
Input Mode
To A/D Module Channel Input
CVROE
CV
REF
To A/D Module VREF-
CVREF pin
Data
Bus
QD
Q
CK
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
V
SS
RA4/T0CKI/
QD
Q
CK
DQ
EN
TMR0 Clock Input
Comparator 1 Output
Comparator Mode = 011, 101, 001
1
0
Analog
Input Mode
Schmitt Trigger
Input Buffer
C1OUT pin