Datasheet

PIC16F7X7
DS30498C-page 50 2004 Microchip Technology Inc.
FIGURE 5-1: BLOCK DIAGRAM OF
RA0/AN0:RA1/AN1 PINS
FIGURE 5-2: BLOCK DIAGRAM OF
RA3/AN3/V
REF+ PIN
Data
Bus
QD
Q
CK
P
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
Analog
V
SS
VDD
I/O pin
QD
Q
CK
Input Mode
DQ
EN
To Comparator
TTL
Input Buffer
To A/D Module Channel Input
Data
Bus
QD
Q
CK
P
N
WR
PORTA
WR
TRISA
Data Latch
TRIS Latch
RD TRISA
RD PORTA
Analog
V
SS
VDD
I/O pin
QD
Q
CK
Input Mode
DQ
EN
To Comparator
TTL
Input Buffer
To A/D Module Channel Input
To A/D Module VREF+ Input