Datasheet

 2004 Microchip Technology Inc. DS30498C-page 3
PIC16F7X7
Pin Diagrams (Continued)
10
11
2
3
4
5
6
1
18 19 20 21 22 12 13 14 15
38
8
7
44 43 42 41 40 39
16 17
29
30
31
32
33
23
24
25
26
27
28
36 34 35
9
PIC16F747
37
RA3/AN3/VREF+
RA2/AN2/V
REF-/CVREF
RA1/AN1 RA0/AN0
MCLR
/VPP/RE3
NC
RB7/PGD RB6/PGC
RB5/AN13/CCP3
RB4/AN11
NC
RC6/TX/CK RC5/SDO RC4/SDI/SDA RD3/PSP3 RD2/PSP2 RD1/PSP1 RD0/PSP0 RC3/SCK/SCL RC2/CCP1 RC1/T1OSI/CCP2(1) NC
NC
RC0/T1OSO/T1CKI
OSC1/CLKI/RA7
OSC2/CLKO/RA6
V
SS
VDD
RE2/CS/AN7
RE1/WR
/AN6
RE0/RD
/AN5
RA5/AN4/LVDIN/SS
/C2OUT
RA4/T0CKI/C1OUT
RC7/RX/DT
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
V
SS
VDD
RB0/INT/AN12
RB1/AN10
RB2/AN8
RB3/CCP2
(1)
/AN9
TQFP (44-pin)
PIC16F777
RB7/PGD
RB6/PGC
RB5/AN13/CCP3
RB4/AN11
RB3/CCP2
(1)
/AN9
RB2/AN8
RB1/AN10
RB0/INT/AN12
V
DD
VSS
RD7/PSP7
RD6/PSP6
RD5/PSP5
RD4/PSP4
RC7/RX/DT
RC6/TX/CK
RC5/SDO
RC4/SDI/SDA
RD3/PSP3
RD2/PSP2
MCLR/VPP/RE3
RA0/AN0
RA1/AN1
RA2/AN2/V
REF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/LVDIN/SS
/C2OUT
RE0/RD
/AN5
RE1/WR
/AN6
RE2/CS
/AN7
V
DD
VSS
OSC2/CLKO/RA6
OSC1/CLKI/RA7
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
(1)
RC2/CCP1
RC3/SCK/SCL
RD0/PSP0
RD1/PSP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
PIC16F747/777
PDIP (40-pin)
Note 1: Pin location of CCP2 is determined by the CCPMX bit in Configuration Word Register 1.