Datasheet
2002 Microchip Technology Inc. DS30325B-page 7
PIC16F7X
FIGURE 1-2: PIC16F74 AND PIC16F77 BLOCK DIAGRAM
FLASH
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
8 Level Stack
(13-bit)
RAM
File
Registers
Direct Addr
7
RAM Addr
(1)
9
Addr MUX
Indirect
Addr
FSR reg
STATUS reg
MUX
ALU
W reg
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
MCLR
VDD, VSS
PORTA
PORTB
PORTC
PORTD
PORTE
RA4/T0CKI
RA5/AN4/SS
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
RE0/AN5/RD
RE1/AN6/WR
RE2/AN7/CS
8
8
Brown-out
Reset
Note 1: Higher order bits are from the STATUS register.
USART
CCP2
Synchronous
8-bit A/DTimer0 Timer1 Timer2
Serial Port
RA3/AN3/VREF
RA2/AN2
RA1/AN1
RA0/AN0
Parallel Slave Port
8
3
RB0/INT
RB1
RB2
RB3/PGM
RB4
RB5
RB6/PGC
RB7/PGD
Device Program FLASH Data Memory
PIC16F74 4K 192 Bytes
PIC16F77 8K 368 Bytes
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
CCP1