Datasheet

2002 Microchip Technology Inc. DS30325B-page 41
PIC16F7X
FIGURE 4-9: PARALLEL SLAVE PORT WRITE WAVEFORMS
FIGURE 4-10: PARALLEL SLAVE PORT READ WAVEFORMS
TABLE 4-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
Q1 Q2 Q3 Q4
CS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
WR
RD
IBF
OBF
PSPIF
PORTD<7:0>
Q1 Q2 Q3 Q4
CS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
WR
IBF
PSPIF
RD
OBF
PORTD<7:0>
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on
all other
RESETS
08h PORTD Port data latch when written: Port pins when read
xxxx xxxx uuuu uuuu
09h PORTE RE2 RE1 RE0 ---- -xxx ---- -uuu
89h TRISE IBF OBF IBOV PSPMODE PORTE Data Direction Bits 0000 -111 0000 -111
0Ch PIR1
PSPIF
(1)
ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
8Ch PIE1
PSPIE
(1)
ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
9Fh ADCON1 PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Parallel Slave Port.
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F73/76; always maintain these bits clear.