Datasheet
PIC16F7X
DS30325B-page 36 2002 Microchip Technology Inc.
4.4 PORTD and TRISD Registers
This section is not applicable to the PIC16F73 or
PIC16F76.
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configureable as an input or
output.
PORTD can be configured as an 8-bit wide micro-
processor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
FIGURE 4-6: PORTD BLOCK DIAGRAM
(IN I/O PORT MODE)
TABLE 4-7: PORTD FUNCTIONS
TABLE 4-8: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
Data Bus
WR Port
WR TRIS
RD Port
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
Input
Buffer
I/O pin
(1)
Note 1: I/O pins have protection diodes to VDD and VSS.
QD
CK
QD
CK
EN
QD
EN
Name Bit# Buffer Type Function
RD0/PSP0 bit0
ST/TTL
(1)
Input/output port pin or parallel slave port bit0
RD1/PSP1 bit1
ST/TTL
(1)
Input/output port pin or parallel slave port bit1
RD2/PSP2 bit2
ST/TTL
(1)
Input/output port pin or parallel slave port bit2
RD3/PSP3 bit3
ST/TTL
(1)
Input/output port pin or parallel slave port bit3
RD4/PSP4 bit4
ST/TTL
(1)
Input/output port pin or parallel slave port bit4
RD5/PSP5 bit5
ST/TTL
(1)
Input/output port pin or parallel slave port bit5
RD6/PSP6 bit6
ST/TTL
(1)
Input/output port pin or parallel slave port bit6
RD7/PSP7 bit7
ST/TTL
(1)
Input/output port pin or parallel slave port bit7
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on:
POR,
BOR
Value on
all other
RESETS
08h PORTD RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0
xxxx xxxx uuuu uuuu
88h TRISD PORTD Data Direction Register 1111 1111 1111 1111
89h TRISE IBF OBF IBOV PSPMODE — PORTE Data Direction bits 0000 -111 0000 -111
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTD.