Datasheet

PIC16F72X/PIC16LF72X

7.4 Oscillator Control

The Oscillator Control (OSCCON) register (Figure 7-1)

displays the status and allows frequency selection of the

internal oscillator (INTOSC) system clock. The

OSCCON register contains the following bits:

• Frequency selection bits (IRCF)

• Status Locked bits (ICSL)

• Status Stable bits (ICSS)

U-0 U-0 R/W-1 R/W-0 R-q R-q U-0 U-0

— — IRCF1 IRCF0 ICSL ICSS — —

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

q = Value depends on condition

bit 7-6 Unimplemented: Read as ‘0’

bit 5-4 IRCF<1:0>: Internal Oscillator Frequency Select bits

When PLLEN = 1 (16 MHz INTOSC)

11 =16MHz

10 = 8 MHz (POR value)

01 =4MHz

00 =2MHz

When PLLEN =

0 (500 kHz INTOSC)

11 = 500 kHz

10 = 250 kHz (POR value)

01 = 125 kHz

00 = 62.5 kHz

bit 3 ICSL: Internal Clock Oscillator Status Locked bit (2% Stable)

1 = 16 MHz/500 kHz Internal Oscillator (HFIOSC) is in lock.

0 = 16 MHz/500 kHz Internal Oscillator (HFIOSC) has not yet locked.

bit 2 ICSS: Internal Clock Oscillator Status Stable bit (0.5% Stable)

1 = 16 MHz/500 kHz Internal Oscillator (HFIOSC) has stabilized to its maximum accuracy

0 = 16 MHz/500 kHz Internal Oscillator (HFIOSC) has not yet reached its maximum accuracy

bit 1-0 Unimplemented: Read as ‘0’