Datasheet

PIC16F72X/PIC16LF72X
DS41341E-page 68 © 2009 Microchip Technology Inc.
FIGURE 6-9: BLOCK DIAGRAM OF RB3
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
RD
WR
WR
RD
Data Bus
PORTB
TRISB
TRISB
PORTB
D
Q
CK
Q
VDD
Weak
WR
WPUB
RD
WPUB
RBPU
D
Q
CK
Q
D
EN
Q
D
EN
Q
RD PORTB
WR
IOCB
RD
IOCB
Interrupt-on-
Change
Q3
ANSB<5,3>
To CCP2
(1)
Note 1: CCP2 input is controlled by CCP2SEL in the APFCON register.
0
1
CCP2OUT
CCP2OUT
Enable
To A/D Converter
To Cap Sensor