Datasheet

PIC16F72X/PIC16LF72X
DS41341E-page 22 © 2009 Microchip Technology Inc.
FIGURE 2-5: PIC16F723/LF723 AND PIC16F724/LF724 SPECIAL FUNCTION REGISTERS
Legend: = Unimplemented data memory locations, read as ‘0’.
* = Not a physical register.
Note 1: PORTD, TRISD, ANSELD and ANSELE are not implemented on the PIC16F723/LF723, read as ‘0’
File Address
Indirect addr.
(*)
00h Indirect addr.
(*)
80h Indirect addr.
(*)
100h Indirect addr.
(*)
180h
TMR0 01h OPTION 81h TMR0 101h OPTION 181h
PCL 02h PCL 82h PCL 102h PCL 182h
STATUS 03h STATUS 83h STATUS 103h STATUS 183h
FSR 04h FSR 84h FSR 104h FSR 184h
PORTA 05h TRISA 85h
105h
ANSELA
185h
PORTB 06h TRISB 86h
106h
ANSELB
186h
PORTC 07h TRISC 87h
107h 187h
PORTD
(1)
08h TRISD
(1)
88h
CPSCON0
108h
ANSELD
(1)
188h
PORTE 09h TRISE 89h
CPSCON1
109h
ANSELE
(1)
189h
PCLATH 0Ah PCLATH 8Ah PCLATH 10Ah PCLATH 18Ah
INTCON 0Bh INTCON 8Bh INTCON 10Bh INTCON 18Bh
PIR1 0Ch PIE1 8Ch PMDATL 10Ch PMCON1 18Ch
PIR2 0Dh PIE2 8Dh PMADRL 10Dh
Reserved 18Dh
TMR1L 0Eh PCON 8Eh PMDATH 10Eh
Reserved 18Eh
TMR1H 0Fh T1GCON 8Fh PMADRH 10Fh
Reserved 18Fh
T1CON 10h OSCCON 90h
110h 190h
TMR2 11h OSCTUNE 91h
111h 191h
T2CON 12h PR2 92h
112h 192h
SSPBUF 13h SSPADD/SSPMSK 93h
113h 193h
SSPCON 14h SSPSTAT 94h
114h 194h
CCPR1L 15h WPUB 95h
115h 195h
CCPR1H 16h IOCB 96h
116h 196h
CCP1CON 17h
97h 117h 197h
RCSTA 18h TXSTA 98h
118h 198h
TXREG 19h SPBRG 99h
119h 199h
RCREG 1Ah
9Ah 11Ah 19Ah
CCPR2L 1Bh
9Bh 11Bh 19Bh
CCPR2H 1Ch APFCON 9Ch
11Ch 19Ch
CCP2CON 1Dh FVRCON 9Dh
11Dh 19Dh
ADRES
1Eh
9Eh 11Eh 19Eh
ADCON0 1Fh ADCON1 9Fh
11Fh 19Fh
General
Purpose
Register
96 Bytes
20h
7Fh
General
Purpose
Register
80 Bytes
A0h
EFh
General Purpose
Register
16 Bytes
120h
12Fh
130h
16Fh
1A0h
1EFh
Accesses
70h-7Fh
F0h
FFh
Accesses
70h-7Fh
170h
17Fh
Accesses
70h-7Fh
1F0h
1FFh
Bank 0 Bank 1 Bank 2 Bank 3